ARYA JAIN
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AVAILABLE FOR INTERNSHIPS — SUMMER 2027

ARYA JAIN

Computer Engineering @ Cal Poly SLO — Hardware Engineer|

I work on both sides of the board — designing schematics and circuits, then writing the firmware and software that run on them. From a custom STM32 board for a Formula SAE car to a 32-bit RISC-V processor built from the gate level up, I move fluidly between circuits and code. 4.0 GPA, Java/Python/C at the core, equally at home in LTspice as in a terminal.

Location · San Diego, CA GPA · 4.0 / 4.0 Grad · Dec 2027 Focus · Hardware + Software GitHub · github.com/aryaj1002
01 — About

I'm a Computer Engineering student at Cal Poly, San Luis Obispo, and I build on both sides of the board: the circuits and the code that runs on them. On the hardware side, that means schematic capture, PCB layout, analog circuit design, and digital logic down to the gate level. On the software side, it's Java, Python, C, data structures, algorithms, and object-oriented design applied to robotics, pathfinding, and systems programming.

Outside coursework, I've designed a custom STM32-compatible PCB for a Formula SAE vehicle, built a 32-bit RISC-V processor core from scratch in SystemVerilog, and designed analog circuits for infrared data communication. I gravitate toward problems that span the stack — where a decision on a schematic shows up as a bug three layers up in the code, and vice versa.

Awards & Recognition
  • Cal Poly Dean's List Scholarship & Merit Scholar
  • National Merit Commended Scholar
  • AP Scholar with Distinction
  • Multiple 1st-place engineering / innovation awards
  • SAT Math — 800 / 800
student_spec.dat
SCHOOLCal Poly, SLO
DEGREEB.S. Computer Engineering
GPA4.0 / 4.0
EXPECTEDDecember 2027
FOCUSHardware + Software
CITIZENSHIPU.S. Citizen
BASED INSan Diego, CA
COURSEWORKDSA · OOD · Systems · Arch · Embedded · Lin. Alg.
02 — Skills

Hardware & Embedded

SystemVerilogRISC-VDigital DesignFSM DesignAnalog Circuit Design555 Timer ICsSTM32ArduinoPCB DesignFusion360LTspiceASM

Software & Foundations

JavaPythonCData StructuresAlgorithmsOODGit

Tools & Platforms

GitHubJupyterAWSUnix/LinuxA* SearchStrategy Pattern

AI & Vision

OpenCVTensorFlow LiteCNNsYOLOGeminiGenAI6DoF Pose Estimation
03 — Experience
Sept 2025 — Present
Embedded Software Engineer
Cal Poly Racing — Formula SAE
  • Designed a custom STM32-compatible PCB, defining power, sensor, actuator, and communication interfaces for a Formula SAE vehicle system.
  • Created schematics, board layouts, pin assignments, and component selections while collaborating through Git Bash / version control.
  • Applied embedded hardware and software design fundamentals to support iterative development across electrical and software subsystems.
Summers 2024 & 2025
Lead Intern
San Diego Unified School District
  • Developed and taught a Python- and Java-based programming curriculum to 400+ students internationally.
  • Delivered project-based computer science instruction and supported hands-on STEM curriculum development.
04 — Selected Projects
PROJ.01
32-bit RISC-V (RV32I) Processor
  • Built a 32-bit RISC-V (RV32I) processor in SystemVerilog, implementing and integrating 10+ modular datapath and control components.
  • Designed a finite state machine and combinational decoder to generate control signals for instruction execution, memory access, branching, and register write-back.
  • Implemented core hardware — register file, ALU, immediate generator, branch unit, program counter — supporting arithmetic, logic, load/store, and control-flow instructions.
  • Verified end-to-end functionality through hierarchical integration, building a complete OTTER MCU datapath with memory and I/O interfaces.
SystemVerilogRISC-VDigital DesignFSM
PROJ.02
FSK Infrared Communication System
  • Designed and built a frequency-shift keying (FSK) infrared communication system using 555 timers, photodiodes, and trans-impedance amplifiers for reliable data transmission.
  • Selected and specified components through datasheet analysis and back-of-envelope calculations; validated transmitter and receiver designs in LTspice before building hardware.
  • Built a multi-stage analog receiver — trans-impedance amplifier, comparator, one-shot pulse generator, and low-pass filter — to decode IR signals into distinct voltage levels.
  • Demonstrated the complete system transmitting and decoding ASCII-coded messages live.
555 TimerLTspiceAnalog DesignIR Comms
PROJ.03
Java Virtual World Simulation
  • Built a Java object-oriented simulation with autonomous entities navigating obstacle-filled environments via A* pathfinding.
  • Applied the Strategy Design Pattern to decouple movement logic through a common PathingStrategy interface, enabling reusable, extensible pathfinding.
  • Designed an A* search engine using heuristic optimization, hash maps, and collections to compute efficient paths and reconstruct routes.
  • Used Java streams, lambdas, and automated tests to improve code quality and correctness across a multi-entity simulation.
JavaA* SearchOODStrategy Pattern
PROJ.04
Simplified File System Emulator
  • Developed a C-based file system emulator implementing directory navigation, file creation, and directory management through a custom CLI.
  • Designed an inode-based storage system supporting up to 1,024 inodes, with metadata management for files and directories using binary structures.
  • Implemented low-level file I/O to read, write, validate, and persist file system metadata across program executions.
  • Built core commands (ls, cd, mkdir, touch, exit) with error handling and directory traversal.
CUnix/LinuxCLISystems Programming
05 — Contact

Building something that spans hardware and software? Let's talk.

I'm looking for summer 2027 internships — hardware, software, or the roles that need both — and always happy to talk shop about PCBs, pathfinding, or processor design.